Digital demodulators extract digital data from a carrier signal. Numerous modulation schemes are known to those skilled in the art, and digital demodulators extract digital data using a technique which complements the modulation scheme. Many modulation schemes convey digital data as relative phase relationships between in-phase (I) and in-quadrature (Q) components of the carrier signal. At one instant in time the phase relationship conveys a first digital code, then the phase relationship changes so that at a second instant in time the phase relationship conveys a second digital code. The duration between these instants in time is referred to as a baud interval, baud, symbol interval, or symbol. A digital demodulator needs to identify these instants in time so that the phase relationships may be examined primarily at these instants and not at instants when the phase relationships are transitioning between data codes. If the examination or decision point within the symbols is not held at close to an optimum point, excessive bit error rates may result.
Symbol framing or timing recovery loops typically examine the data codes extracted from the carrier signal and/or other signals derived from the carrier signal to define symbol framing. Conventional timing recovery loops take samples both at decision points within symbols and at zero-crossing points approximately half-way between the decision points. Decision points are adjusted based upon differences between the occurrences of actual zero-crossing points and zero-crossing points which are predicted based upon the current decision points.
Conventional timing recovery loops suffer from numerous problems. Conventional timing recovery loop techniques lead to excessive circuit complexity, particularly when adapted to higher order modulation formats. The excessive complexity leads to increased costs, increased power consumption, and reduced reliability. One factor which leads to excessive complexity is the need to obtain at least two samples per symbol. This requires a digitizer to either operate at twice the symbol rate or include multiple synchronized digitizers. If a digitizer operates at twice the symbol rate, then the demodulator is limited to handling a symbol rate of only one-half the rate supported by the digitizer's processing technology. If multiple synchronized digitizers are used, then difficult and error prone alignment procedures must be performed to precisely synchronize the timing.
Furthermore, the timing of a zero crossing point has only an approximate relationship with an optimum decision point. A prediction for when a zero crossing point should occur is typically based upon the assumption that the zero crossing point should occur half-way between optimum decision points. This assumption is not precisely correct. Input filtering may distort the timing of zero crossing points so they do not occur precisely half-way between optimum decision points. Consequently, conventional timing recovery loops introduce the errors associated with predicting zero crossing points into the timing of decision points.